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ADF4602BCPZ 데이터시트(PDF) 8 Page - Analog Devices

부품명 ADF4602BCPZ
상세설명  Single-Chip, Multiband 3G Femtocell Transceiver
PDF  36 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADF4602BCPZ 데이터시트(HTML) 8 Page - Analog Devices

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ADF4602
Rev. 0 | Page 8 of 36
TIMING CHARACTERISTICS
VDD = 3.1 V to 3.6 V, VGND = 0 V, TA = 25°C, unless otherwise noted. Guaranteed by design but not production tested.
Table 2.
Parameter
Limit at TMIN to TMAX
Unit
Test Conditions/Comments
t1
62
ns min
SEN high to write time
t2
10
ns min
SEN to SCLK setup time
t3
10
ns min
SDATA to SCLK setup time
t4
10
ns min
SDATA to SCLK hold time
t5
31
ns min
SCLK high duration
t6
31
ns min
SCLK low duration
t7
10
ns min
SEN to SCLK hold time
t8
20
ns max
SEN to SDATA valid delay
t9
20
ns max
SCLK to SDATA valid delay
t10
20
ns max
SEN to SDATA disabled delay
W[25]
W[24]
W[1]
SCLK
SDATA
SEN
W[0]
WRITE
t3
t2
t7
t1
t4
t6
t5
Figure 2. Serial Interface Write Diagram
Q[25]
Q[24]
Q[1]
SCLK
SDATA
SEN
Q[0]
R[25]
R[24]
R[1]
R[0]
3or more
SYSCLK periods
DBB releases
RSDATA
selected device
drives RSDATA
READ
READ REQUEST
t8
t10
t9
3 OR MORE
SCLK PERIODS
HOST RELEASES
SDATA
ADF4602
DRIVES SDATA
Figure 3. Serial Interface Read/Write Diagram



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