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ADP150AUJZ-2.8-R7 데이터시트(PDF) 6 Page - Analog Devices

부품명 ADP150AUJZ-2.8-R7
상세설명  Ultralow Noise, 150 mA CMOS Linear Regulator
PDF  20 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADP150AUJZ-2.8-R7 데이터시트(HTML) 6 Page - Analog Devices

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ADP150
Rev. 0 | Page 6 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC = NO CONNECT
TOP VIEW
(Not to Scale)
ADP150
1
2
3
5
4
VIN
GND
EN
VOUT
NC
Figure 3. 5-Lead TSOT Pin Configuration
12
A
B
TOP VIEW
(Not to Scale)
VIN
VOUT
EN
GND
Figure 4. 4-Ball WLCSP Pin Configuration
Table 5. 5-Lead TSOT Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VIN
Regulator Input Supply. Bypass VIN to
GND with a 1 μF or greater capacitor.
2
GND
Ground.
3
EN
Enable Input. Drive EN high to turn on
the regulator; drive EN low to turn off
the regulator. For automatic startup,
connect EN to VIN.
4
NC
No Connect. Not connected internally.
5
VOUT
Regulated Output Voltage. Bypass VOUT
to GND with a 1 μF or greater capacitor.
Table 6. 4-Ball WLCSP Pin Function Descriptions
Pin No.
Mnemonic
Description
A1
VIN
Regulator Input Supply. Bypass VIN to
GND with a 1 μF or greater capacitor.
A2
VOUT
Regulated Output Voltage. Bypass VOUT
to GND with a 1 μF or greater capacitor.
B1
EN
Enable Input. Drive EN high to turn on
the regulator; drive EN low to turn off
the regulator. For automatic startup,
connect EN to VIN.
B2
GND
Ground.



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