LTC2637 datasheet(21/28 Pages) LINER

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LTC2637

2637fa

operation

Write Word Protocol

The master initiates communication with the LTC2637

with a START condition and a 7-bit slave address followed

by the Write bit (W) = 0. The LTC2637 acknowledges by

pulling the SDA pin low at the 9th clock if the 7-bit slave

address matches the address of the part (set by CA0, CA1

or CA2) or the global address. The master then transmits

three bytes of data. The LTC2637 acknowledges each byte

of data by pulling the SDA line low at the 9th clock of each

databytetransmission.Afterreceivingthreecompletebytes

of data, the LTC2637 executes the command specified in

the 24-bit input word.

If more than three data bytes are transmitted after a valid

7-bitslaveaddress,theLTC2637doesnotacknowledgethe

extra bytes of data (SDA is high during the 9th clock).

The format of the three data bytes is shown in Figure

3. The first byte of the input word consists of the 4-bit

command, followed by the 4-bit DAC address. The next

two bytes contain the 16-bit data word, which consists

of the 12-, 10- or 8-bit input code, MSB to LSB, followed

by 4, 6 or 8 don’t-care bits (LTC2637-12, LTC2637-10

and LTC2637-8, respectively). A typical LTC2637 write

transaction is shown in Figure 4.

The command bit assignments (C3-C0) and address (A3-

A0) assignments are shown in Tables 3 and 4. The first

four commands in the table consist of write and update

operations. A write operation loads a 16-bit data word

from the 32-bit shift register into the input register. In an

update operation, the data word is copied from the input

8-bit input code, and is converted to an analog voltage at

the DAC output. Write to and Update combines the first

two commands. The Update operation also powers up the

DAC if it had been in power-down mode. The data path

and registers are shown in the Block Diagram.

Table 3. Command Codes

COMMAND*

C3 C2 C1 C0

0 Write to Input Register n

1 Update (Power Up) DAC Register n

0 Write to Input Register n, Update (Power Up) All

1 Write to and Update (Power Up) DAC Register n

0 Power Down n

1 Power Down Chip (All DAC’s and Reference)

0 Select Internal Reference (Power Up Reference)

1 Select External Reference (Power Down Internal

Reference)

1 No Operation

*Command codes not shown are reserved and should not be used.

Table 4. Address Codes

ADDRESS (n)*

A3 A2 A1 A0

0 DAC A

1 DAC B

0 DAC C

1 DAC D

0 DAC E

1 DAC F

0 DAC G

1 DAC H

1 All DACs

*Address codes not shown are reserved and should not be used.

Reference Modes

For applications where an accurate external reference is

either not available, or not desirable due to limited space,

the LTC2637 has a user-selectable, integrated reference.

The integrated reference voltage is internally amplified

by 2x to provide the full-scale DAC output voltage range.

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