DA6501.001

27 October 2008

10 (16)

MAS6501 PAD LAYOUT

6501

1740 µ

µ

µ

µ

m

Die dimensions 1740 µm x 2090 µm; round PAD ∅ 80 µm

Note: Because the substrate of the die is internally connected to GND, the die has to be placed over a GND

plate on PCB or left floating. Please make sure that GND is the first pad to be bonded. Pick-and-place and all

component assembly are recommended to be performed in ESD protected area.

Note: Coordinates are pad center points where origin has been located in the center of the silicon die.

Pad Identification

Name

X-coordinate

Y-coordinate

End of Conversion

EOC

-713 µm

-839 µm

Power Supply

VDD

-450 µm

-839 µm

Master Clock

MCLK

-200 µm

-839 µm

Clear I2C, Stop Conversion

XCLR

-18 µm

-839 µm

Serial Bus Data Input/Output

SDA

318 µm

-839 µm

Serial Bus Clock

SCL

726 µm

-839 µm

Supply Ground

GND

-713 µm

839 µm

Sensor Ground

COMMON

-450 µm

839 µm

ADC Positive Input

PI

-200 µm

839 µm

Test Pin 2

TE2

-18 µm

839 µm

ADC Negative Input

NI

318 µm

839 µm

Test Pin 1

TE1

726 µm

839 µm

Note: Test pins TE1 and TE2 must be left floating.