Data Sheet

2

Rev. 2.5, 2007-03-20

TLE 4267

Application

The IC regulates an input voltage

V

voltage of

V

4.5 V). The reset delay can be set with an external capacitor. The device has two logic

inputs. A voltage of

V

Depending on the voltage on pin E6 the IC may be hold in active-state even if

V

to low level. This makes it simple to implement a self-holding circuit without external

components. When the device is turned off, the output voltage drops to 0 V and current

consumption tends towards 0

µA.

Design Notes for External Components

The input capacitor

C

circuit consisting of lead inductance and input capacitance can be damped by a resistor

of approx. 1

regulating circuit. Stability is guaranteed at values of

≥ 22 µF and an ESR of ≤ 3 Ω within

the operating temperature range.

Circuit Description

The control amplifier compares a reference voltage, which is kept highly accurate by

resistance adjustment, to a voltage that is proportional to the output voltage and drives

the base of the series transistor via a buffer. Saturation control as a function of the load

current prevents any over-saturating of the power element.

The reset output RO is in high-state if the voltage on the delay capacitor

C

equal

V

greater than the reset threshold

V

discharge of the delay capacitor

C

reset output RO is set to low-level (see Figure 6). The reset delay can be set within wide

range by dimensioning the capacitance of the external capacitor.