ATtiny5 datasheet(17/20 Pages) ATMEL

17 / 20 page

8127CS–AVR–10/09

ATtiny4/5/9/10

9. Datasheet Revision History

9.1

Rev. 8127C – 10/09

1. Updated values and notes:

– Table 16-1 in Section 16.2 “DC Characteristics” on page 116

– Table 16-3 in Section 16.4 “Clock Characteristics” on page 118

– Table 16-6 in Section 16.5.2 “VCC Level Monitor” on page 119

– Table 16-9 in Section 16.8 “Serial Programming Characteristics” on page 121

2. Updated Figure 16-1 in Section 16.3 “Speed Grades” on page 117

3. Added Typical Characteristics Figure 17-36 in Section 17.2.7 “Analog Comparator Off-

set” on page 140. Also, updated some other plots in Typical Characteristics.

4. Added topside and bottomside marking notes in Section 6. “Ordering Information” on

page 10, up to page 13

5. Added ESD errata, see Section 8. “Errata” on page 15

6. Added Lock bits re-programming errata, see Section 8. “Errata” on page 15

9.2

Rev. 8127B – 08/09

1. Updated document template

2. Expanded document to also cover devices ATtiny4, ATtiny5 and ATtiny9

3. Added section:

– “Comparison of ATtiny4, ATtiny5, ATtiny9 and ATtiny10” on page 4

4. Updated sections:

– “ADC Clock – clkADC” on page 18

– “Starting from Idle / ADC Noise Reduction / Standby Mode” on page 20

– “ADC Noise Reduction Mode” on page 24

– “Analog to Digital Converter” on page 25

– “SMCR – Sleep Mode Control Register” on page 25

– “PRR – Power Reduction Register” on page 26

– “Alternate Functions of Port B” on page 48

– “Overview” on page 83

– “Physical Layer of Tiny Programming Interface” on page 96

– “Overview” on page 107

– “ADC Characteristics (ATtiny5/10, only)” on page 120

– “Supply Current of I/O Modules” on page 122

– “Register Summary” on page 6

– “Ordering Information” on page 10

5. Added figure:

– “Using an External Programmer for In-System Programming via TPI” on page 97

6. Updated figure:

– “Data Memory Map (Byte Addressing)” on page 15

7. Added table:

– “Number of Words and Pages in the Flash (ATtiny4/5)” on page 109

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