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ATmega165-16AI 데이터시트(PDF) 43 Page - ATMEL Corporation

부품명 ATmega165-16AI
상세설명  8-bit Microcontroller with 16K Bytes In-System Programmable Flash
PDF  336 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega165-16AI 데이터시트(HTML) 43 Page - ATMEL Corporation

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43
ATmega165/V
2573G–AVR–07/09
Watchdog Timer
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at
1 MHz. This is the typical value at V
CC = 5V. See characterization data for typical values
at other V
CC levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset
interval can be adjusted as shown in Table 21 on page 44. The WDR – Watchdog Reset
– instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is
disabled and when a Chip Reset occurs. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the ATmega165 resets and executes from the Reset Vector. For tim-
ing details on the Watchdog Reset, refer to Table 21 on page 44.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out
period, two different safety levels are selected by the fuse WDTON as shown in Table
20. Refer to “Timed Sequences for Changing the Configuration of the Watchdog Timer”
on page 45 for details.
Figure 20. Watchdog Timer
Watchdog Timer Control
Register – WDTCR
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega165 and will always read as zero.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog
will not be disabled. Once written to one, hardware will clear this bit after four clock
cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. This
bit must also be set when changing the prescaler bits. See “Timed Sequences for
Changing the Configuration of the Watchdog Timer” on page 45.
Table 20. WDT Configuration as a Function of the Fuse Settings of WDTON
WDTON
Safety
Level
WDT Initial
State
How to Disable the
WDT
How to Change
Time-out
Unprogrammed
1
Disabled
Timed sequence
Timed sequence
Programmed
2
Enabled
Always enabled
Timed sequence
WATCHDOG
OSCILLATOR
Bit
7654
321
0
–
–
–
WDCE
WDE
WDP2
WDP1
WDP0
WDTCR
Read/Write
R
R
R
R/W
R/W
R/W
R/W
R/W
Initial Value
0000
000
0



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