ATmega1284P datasheet(48/468 Pages) ATMEL

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8152G–AVR–11/09

ATmega164PA/324PA/644PA/1284P

9.12

9.12.1

SMCR – Sleep Mode Control Register

The Sleep Mode Control Register contains control bits for power management.

• Bits 3, 2, 1 – SM2:0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the five available sleep modes as shown in Table 9-2.

Note:

1. Standby modes are only recommended for use with external crystals or resonators.

• Bit 0 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

Bit

543210

0x33 (0x53)

––

SM2

SM1

SM0

SMCR

Read/Write

RRRR

R/W

Initial Value

000000

Table 9-2.

Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

000

Idle

ADC Noise Reduction

010

Power-down

011

Power-save

100

Reserved

101

Reserved

110

Standby(1)

Extended Standby(1)

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