LSM303DLH datasheet(31/47 Pages) STMICROELECTRONICS

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LSM303DLH

Registers description

Doc ID 16941 Rev 1

31/47

internal registers related to trimming functions to permit good device behavior. If, for any

reason, the content of the trimming registers was changed, it is sufficient to use this bit to

restore the correct values. When the BOOT bit is set to ‘1’ the content of internal Flash is

copied to the corresponding internal registers and is used to calibrate the device. These

values are factory-trimmed and are different for every accelerometer. They permit good

device behavior and normally do not have to be modified. At the end of the boot process, the

BOOT bit is again set to ‘0’.

HPCF[1:0]. These bits are used to configure the high-pass filter cut-off frequency ft,which is

given by:

The equation can be simplified to the following approximated equation:

9.1.3

CTRL_REG3_A (22h)

Table 24.

High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset reading HP_RESET_FILTER)

Reference signal for filtering

Normal mode (reset reading HP_RESET_FILTER)

Table 25.

High-pass filter cut-off frequency configuration

HPcoeff2,1

ft [Hz]

Data rate = 50 Hz

ft [Hz]

Data rate = 100 Hz

ft [Hz]

Data rate = 400 Hz

ft [Hz]

Data rate = 1000 Hz

0.5

0.25

0.5

0.125

0.25

2.5

HPc

------------

–

⎝⎠

⎛⎞

------

⋅

6HPc

⋅

----------------------

Table 26.

CTRL_REG3_A register

IHL

PP_OD

LIR2

I2_CFG1

I2_CFG0

LIR1

I1_CFG1

I1_CFG0

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