MMA2201KEG

Sensors

4

Freescale Semiconductor

PRINCIPLE OF OPERATION

The Freescale accelerometer is a surface-micromachined

integrated-circuit accelerometer.

The device consists of a surface micromachined

capacitive sensing cell (g-cell) and a CMOS signal

conditioning ASIC contained in a single integrated circuit

package. The sensing element is sealed hermetically at the

wafer level using a bulk micromachined “cap” wafer.

The g-cell is a mechanical structure formed from

semiconductor materials (polysilicon) using semiconductor

processes (masking and etching). It can be modeled as a set

of beams attached to a movable central mass that moves

between fixed beams. The movable beams can be deflected

from their rest position by subjecting the system to an

acceleration (Figure 3).

When the beams attached to the center mass move, the

distance from them to the fixed beams on one side will

increase by the same amount that the distance to the fixed

beams on the other side decreases. The change in distance

is a measure of acceleration.

The g-cell beams form two back-to-back capacitors

distance between the beams change and each capacitor's

value will change, (C = NA

ε/D). Where A is the area of the

facing side of the beam,

ε is the dielectric constant, and D is

the distance between the beams, and N is the number of

beams.

The CMOS ASIC uses switched capacitor techniques to

measure the g-cell capacitors and extract the acceleration

data from the difference between the two capacitors. The

ASIC also signal conditions and filters (switched capacitor)

the signal, providing a high level output voltage that is

ratiometric and proportional to acceleration.

SPECIAL FEATURES

Filtering

The Freescale accelerometers contain an onboard 4-pole

switched capacitor filter. A Bessel implementation is used

because it provides a maximally flat delay response (linear

phase) thus preserving pulse shape integrity. Because the

filter is realized using switched capacitor techniques, there is

no requirement for external passive components (resistors

and capacitors) to set the cut-off frequency.

Self-Test

The sensor provides a self-test feature that allows the

verification of the mechanical and electrical integrity of the

accelerometer at any time before or after installation. This

feature is critical in applications such as automotive airbag

systems where system integrity must be ensured over the life

of the vehicle. A fourth “plate” is used in the g-cell as a self-

test plate. When the user applies a logic high input to the self-

test pin, a calibrated potential is applied across the self-test

plate and the moveable plate. The resulting electrostatic

resultant deflection is measured by the accelerometer’s

control ASIC and a proportional output voltage results. This

procedure assures that both the mechanical (g-cell) and

electronic sections of the accelerometer are functioning.

Ratiometricity

Ratiometricity simply means that the output offset voltage

and sensitivity will scale linearly with applied supply voltage.

That is, as you increase supply voltage the sensitivity and

offset increase linearly; as supply voltage decreases, offset

and sensitivity decrease linearly. This is a key feature when

interfacing to a microcontroller or an A/D converter because

it provides system level cancellation of supply induced errors

in the analog to digital conversion process.

Status

Freescale accelerometers include fault detection circuitry

and a fault latch. The Status pin is an output from the fault

latch, OR'd with self-test, and is set high whenever one (or

more) of the following events occur:

•

Supply voltage falls below the Low Voltage Detect (LVD)

voltage threshold

•

Clock oscillator falls below the clock monitor minimum

frequency

•

Parity of the EPROM bits becomes odd in number.

The fault latch can be reset by a falling edge on the self-

test input pin, unless one (or more) of the fault conditions

continues to exist.

Acceleration

Figure 3. Transducer

Physical Model

Figure 4. Equivalent

Circuit Model