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ST7033 데이터시트(PDF) 30 Page - Sitronix Technology Co., Ltd. |
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ST7033 데이터시트(HTML) 30 Page - Sitronix Technology Co., Ltd. |
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30 / 39 page ![]() ST7033 Ver 1.1 30/39 2009/07/17 (VDD1 = 1.8V , Ta =25°C) Rating Item Signal Symbol Condition Min. Max. Units Serial Clock Period tSCYC 280 — SCL “H” pulse width tSHW 140 — SCL “L” pulse width SCLK tSLW 140 — Address setup time tSAS 50 — Address hold time A0 tSAH 150 — Data setup time tSDS 50 — Data hold time SDA tSDH 50 — CS-SCL time tCSS 40 — CS-SCL time /CSB tCSH 180 — ns Notes1: The input signal rise and fall time (tr, tf) are specified at 15 ns or less. Notes2: All timing is specified using 20% and 80% of VDD1 as the standard. |
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