| 전자부품 데이터시트 검색엔진 |
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MSO8000 데이터시트(PDF) 3 Page - Agilent(Hewlett-Packard) |
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MSO8000 데이터시트(HTML) 3 Page - Agilent(Hewlett-Packard) |
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3 / 8 page ![]() Design step 1: Configure the logic analyzer interface file and core parameters You need to create a Altera LAI file with MSO in Quartus II. This file defines the interface that builds a connection between the internal FPGA signals and the MSO digital channels. You can then configure the core parameters, which include number of pins, number of signal banks, the type of measurement (state or timing), clock and the power-up state. A quick tour of the application Design step 2: Map the Altera LAI core outputs to available I/O pins Use Pin Planner in Quartus II to assign physical pin locations for the LAI. 3 |
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