ST7546T

Ver 1.2

21/48

2006/01/26

Column Address Circuit

Column Address Circuit has an 8-bit preset counter that provides Column Address to the Display Data RAM. The display

data RAM column address is specified by the Column Address Set command. The specified column address is

incremented (+1) with each display data read/write command. This allows the MPU display data to be accessed

continuously.

ADDRESSING

Data is downloaded in bytes into the RAM matrix of ST7546T. The display RAM has a matrix of 66 by 102 bits. The

address pointer addresses the columns. The address ranges are: X 0 to 101 (1100101),Y 0 to 9 (1001) .Addresses outside

these ranges are not allowed.In vertical addressing mode (V=1) the Y address increments after each byte. After the last Y

address (Y = 8), Y wraps around to 0 and X increments to address the next column.In horizontal addressing mode (V=0)

the X address increments after each byte. After the last X address(X = 101) X wraps around to 0 and Y increments to

address the next row.After the very last address (X = 101, Y = 8) the address pointers wrap around to address (X = 0, Y =0)

Data structure

0

LSB

MSB

0

101

X-address

1

2

3

4

5

6

7

8

9

LSB

MSB

1 bit

D0

D7

RAM format, addressing