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PCF8883 데이터시트(PDF) 5 Page - NXP Semiconductors

부품명 PCF8883
상세설명  Capacitive proximity switch with auto-calibration, large voltage operating range and very low power consumption
PDF  24 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8883 데이터시트(HTML) 5 Page - NXP Semiconductors

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PCF8883_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 16 October 2009
5 of 24
NXP Semiconductors
PCF8883
Capacitive proximity switch with auto-calibration
8.
Functional description
Figure 3 and Figure 4 show the functional principle of the PCF8883. The discharge time
(tdch) of a chip-internal RC timing circuit, to which the external sensing plate is connected
via pin IN, is compared to the discharge time (tdch(ref)) of a second chip-internal reference
RC timing circuit. Both RC timing circuits are periodically charged from VDD(INTREGD) via
identical switches and then discharged via a resistor to ground (VSS). Both switches are
synchronized.
The charge-discharge cycle is governed by the sampling rate (fs). If the voltage of one of
the RC timing circuits falls below the internal reference voltage Vref, the respective
comparator output will become LOW. The logic following the comparators determines
which comparator switches first. If the upper (reference) comparator switches then a pulse
is given on CUP. If the lower (input) comparator switches first then a pulse is given on
CDN (see Figure 3).
The pulses control the charge on the external capacitor CCPC on pin CPC. Every time a
pulse is given on CUP, capacitor CCPC is charged from VDD(INTREGD) for a fixed time
causing the voltage on CCPC to rise. Likewise when a pulse occurs on CDN, capacitor
CCPC is connected to a current sink to ground for a fixed time causing the voltage on CCPC
to fall.
Fig 3.
Functional diagram of the sensor logic
013aaa093
CPC
VSS
VDD(INTREGD)
Vref
IN
VDD(INTREGD)
CDN
CUP
fs
&
&
Isink
COUNTER
LOGIC



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