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ADE7878ACPZ 데이터시트(PDF) 89 Page - Analog Devices

부품명 ADE7878ACPZ
상세설명  Polyphase Multifunction Energy Metering IC with per Phase Active and Reactive Powers
PDF  92 Pages
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ADE7878ACPZ 데이터시트(HTML) 89 Page - Analog Devices

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ADE7878
Rev. 0| Page 89 of 92
Bit Location
Bit Name
Default Value
Description
4:3
HXFER[1:0]
00
00 = HSDC transmits sixteen 32-bit words in the following order: IAWV, VAWV, IBWV,
VBWV, ICWV, VCWV, one 32-bit word equal to INWV, AVA, BVA, CVA, AWATT, BWATT,
CWATT, AVAR, BVAR, and CVAR.
01 = HSDC transmits seven instantaneous values of currents and voltages: IAWV, VAWV,
IBWV, VBWV, ICWV, VCWV, and INWV.
10 = HSDC transmits nine instantaneous values of phase powers: AVA, BVA, CVA, AWATT,
BWATT, CWATT, AVAR, BVAR, and CVAR.
11 = reserved. If set, the ADE7878 behaves as if HXFER[1:0] = 00.
5
HSAPOL
0
0: HSACTIVE output pin is active low.
1: HSACTIVE output pin is active high.
7:6
Reserved
00
Reserved. These bits do not manage any functionality.
Table 48. LPOILVL Register (Address 0xEC00)
Bit Location
Bit Name
Default value
Description
2:0
LPOIL[2:0]
111
Threshold is put at a value corresponding to full scale multiplied by LPOIL/8.
7:3
LPLINE[4:0]
000
The measurement period is (LPLINE + 1)/50 seconds.
Table 49. CONFIG2 Register (Address 0xEC01)
Bit
Location
Bit Name
Default Value
Description
0
EXTREFEN
0
When this bit is 0, it signifies that the internal voltage reference is used in the ADCs.
When this bit is 1, an external reference is connected to the Pin 17 REFIN/OUT.
1
I2C_LOCK
0
When this bit is 0, the SS/HSA pin can be toggled three times to activate the SPI port. If I2C is the
active serial port, this bit must be set to 1 to lock it in. From this moment on, spurious toggling of
the SS pin and an eventual switch into using the SPI port are no longer possible. If SPI is the
active serial port, any write to the CONFIG2[7:0] register locks the port. From this moment on, a
switch into using I2C port is no longer possible. Once locked, the serial port choice is maintained
when theADE7878 changes PSMx power modes.
7:2
Reserved
0
Reserved. These bits do not manage any functionality.



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