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9 - 13

AS1916 - AS1918

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

9 Application Information

Watchdog Input Current

The watchdog input is driven through an internal buffer and an internal series resistor from the watchdog timer (see

Figure 11 on page 8). When pin WDI is left unconnected (watchdog disabled), the watchdog timer is serviced within the

For minimum watchdog input current (minimum overall power consumption), pull WDI low for most of the watchdog

timeout period, pulsing it low-high-low once within the first 7/8 (87.5%) of the watchdog timeout period to reset the

watchdog timer.

Note:

If WDI is externally driven high for the majority of the timeout period, up to 160µA can flow into pin WDI.

Interfacing to Bi-Directional CPU Reset Pins

Since the reset output of the AS1918 is open drain, this device interfaces easily with processors that have bi-direc-

tional reset pins. Connecting the processor reset output directly to the AS1918 RESETN pin with a single pullup resis-

tor (see Figure 12) allows the AS1918 to assert a reset.

Figure 12. AS1918 RESETN-to-CPU Bi-Directional Reset Pin

Fast Negative-Going Transients

ally immune to such transients. Resets are issued to the CPU during power-up, powerdown, and brownout conditions.

Note:

≤ 55µs typically will not assert a reset pulse.

outputs and a pullup resistor to active-high outputs will ensure that the reset line is valid during the interval where the

reset output can no longer sink or source current.

Watchdog Tips

Careful consideration should be taken when implementing the AS1916 - AS1918 watchdog feature.

One method of supervising software code execution is to set/reset the watchdog input at different places in the code,

rather than pulsing the watchdog input high-low-high or low-high-low. This method avoids a loop condition in which the

watchdog timer would continue to be reset inside the loop, preventing the watchdog from ever timing out.

AS1918

CPU

Reset

Generator

RESETN

GND

1

RESETN

GND

2