HY5PS12421AFP datasheet(21/37 Pages) HYNIX

21 / 37 page

Rev. 0.2 / Mar. 2005

512Mb A-ver. DDR2 SDRAM

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Parameter

Symbol

DDR2-533

DDR2-400

Unit

Note

min

max

min

max

Write recovery time

tWR

-15

Auto precharge write recovery + precharge time

tDAL

WR+tRP

tCK

Internal write to read command delay

tWTR

7.5

-10

Internal read to precharge command delay

tRTP

7.5

Exit self refresh to a non-read command

tXSNR

tRFC + 10

Exit self refresh to a read command

tXSRD

200

tCK

Exit precharge power down to any non-read

command

tXP

tCK

Exit active power down to read command

tXARD

tCK

Exit active power down to read command

(Slow exit, Lower power)

tXARDS

6 - AL

tCK

1, 2

CKE minimum pulse width

(high and low pulse width)

tCKE

tCK

ODT turn-on delay

tAOND

222

tCK

ODT turn-on

tAON

tAC(min)

tAC(max)+

tAC(min)

tAC(max)+

ODT turn-on(Power-Down mode)

tAONPD

tAC(min)+2

2tCK+

tAC(max)+

tAC(min)+2

2tCK+

tAC(max)+

ODT turn-off delay

tAOFD

2.5

tCK

ODT turn-off

tAOF

tAC(min)

tAC(max)+

0.6

tAC(min)

tAC(max)+

0.6

ODT turn-off (Power-Down mode)

tAOFPD

tAC(min)+2

2.5tCK+

tAC(max)+

tAC(min)+2

2.5tCK+

tAC(max)+

ODT to power down entry latency

tANPD

tCK

ODT power down exit latency

tAXPD

tCK

OCD drive mode output delay

tOIT

Minimum time clocks remains ON after CKE

asynchronously drops LOW

tDelay

tIS+tCK+tIH

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