Technical Note

9/9

BA6950FS, BA6951FS

www.rohm.com

2010.02 - Rev.B

© 2010 ROHM Co., Ltd. All rights reserved.

11) Testing on application boards

When testing the IC on an application board, connecting a capacitor to a low impedance pin subjects the IC to stress.

Therefore, always discharge capacitors after each process or step. Always turn the IC's power supply off before

connecting it to or removing it from the test setup during the inspection process. Ground the IC during assembly steps

as an antistatic measure. Use similar precaution when transporting or storing the IC.

12) Switching of rotating direction (FWD/REV)

When the rotating direction is changed over by the motor rotating condition, switch the direction after the motor is

temporarily brought to the BRAKE condition or OPEN condition. It is recommended to keep the relevant conditions as

follows:

via BRAKE: Longer than braking time*.

(* the time required for the output voltage to achieve potential below GND when brake is activated.)

via OPEN: The time longer than 1 ms is recommended.

13) Regarding the input pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements, in order to keep them

isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example, the relation between each potential is as follows:

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, as well as operating malfunctions and physical damage. Therefore, do not use methods by

which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an input pin.



Ordering part number

B

A

6

9

5

0

F

S

-

E

2

Part No.

Part No.

6950

6951

Package

FS: SSOP-A16

Packaging and forming specification

E2: Embossed tape and reel

Resistor

Transistor (NPN)

N

N

N

P

+

P

+

P

P substrate

GND

Parasitic element

Pin A

N

N

P

+

P

+

P

P substrate

GND

Parasitic element

Pin B

C

B

E

N

GND

Pin A

Pin B

Other adjacent elements

E

B

C

GND

Parasitic

element

Appendix: Example of monolithic IC structure

Parasitic

element

<Tape and Reel information>

Embossed carrier tape

Tape

Quantity

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

2500pcs

E2

()

Direction of feed

Reel

1pin

(Unit : mm)

SSOP-A16

13

8

7

0.8

9

15

45

3

11

2

12

16

14

6

1

10

6.6

±0.2

0.15

±0.1

0.36

±0.1

(MAX 6.95 include BURR)

0.1