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DRF1202 데이터시트(PDF) 3 Page - Microsemi Corporation |
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DRF1202 데이터시트(HTML) 3 Page - Microsemi Corporation |
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3 / 4 page ![]() The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high. Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743 and foreign patents. US and Foreign patents pending. All Rights Reserved. DRF1202 The Test Circuit illustrated above was used to evaluate the DRF1202 (available as an evaluation Board DRF12XX / EVALSW.) The input control signal is applied to the DRF1202 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal ground currents. The +V DD inputs (2,6) are by-passed (C1,C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate load. A 50Ω (R4) load is used to evaluate the output performance of the DRF1202. Figure 2, DRF1202 Test Circuit Truth Table *Referenced to SG FN (pin 3)* IN (pin 4)* MOSFET HIGH HIGH ON HIGH LOW OFF LOW HIGH OFF LOW LOW ON |
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