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WM2331CDT/V 데이터시트(PDF) 6 Page - Wolfson Microelectronics plc |
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WM2331CDT/V 데이터시트(HTML) 6 Page - Wolfson Microelectronics plc |
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6 / 25 page ![]() WM2331 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 1.4 April 2001 6 Test Conditions: AVDD = DVDD = 3.0V, fCLK = 30MHz, 50% duty cycle, MODE = AVDD, REFTS = 2.5V, REFBS = 0.5V, PGA gain = 1.0, TA = TMIN to TMAX, unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Power Supplies MODE = AGND, REFSENSE = AVDD 31 45 mA MODE = AVDD/2, REFSENSE = VREF 37 mA Analogue supply current IAVDD MODE = AVDD, REFSENSE = AVDD 36 mA Digital supply current IDVDD CL = 10pF 6 mA Standby power consumption (digital and analogue combined) IVDD(STBY) 3 5 mW Digital Logic Levels (CMOS Levels) Input LOW level VIL (Note 2) 0.2 x VDD V Input HIGH level VIH (Note 2) 0.8 x VDD V Output LOW VOL IOL = -50 µA0.2 V Output HIGH VOH IOH = 50 µA VDD – 0.2 V Notes 1. VCMCS can be applied as a single voltage source to REFTS and REFBS with these two pins connected together. Alternatively the common mode of the input can be set by applying different voltage sources to these two pins, in which case the common mode voltage is effectively the average of these two voltages, VCMCS = (REFTS + REFBS)/2. 2. Digital input and output levels refer to the supply used for the input/output buffer on the relevant pin. CLK and MODE refer to the AVDD supply, all other digital input/output refers to the DVDD supply. 3. In full external reference mode the REFTF and REFTS pins should be shorted together, and the REFBF and REFBS pins should be shorted together. Please refer to device operation examples in the device description section of the datasheet. |
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