Production Data

WM8141

WOLFSON MICROELECTRONICS LTD

PD Rev 3.0 October 2000

15

OUTPUT FORMATS

The digital data output from the ADC is available to the user in either 12-bit parallel or 8/6/4-bit wide

multiplexed formats by setting control bits MUXOP[1:0]. Latency of valid output data with respect to

VSMP is programmable by writing to control bits DEL[1:0]. The latency for each mode is shown in the

Mode Timing Diagrams section.

Figure 10 shows the output data formats for Modes 1 – 2 and 4 – 6. Figure 11 shows the output data

formats for Mode 3. Table 1 summarises the output data obtained for each format.

MCLK

4+4+4-BIT

OUTPUT

A

AB

AB

C

F

12-BIT PARALLEL

OUTPUT

8+4 AND 6+6-BIT

OUTPUT

MCLK

4+4+4-BIT

OUTPUT

A

AB

12-BIT PARALLEL

OUTPUT

8+4 AND 6+6-BIT

OUTPUT

AB

C F

AB

Figure 10 Output Data Formats

(Modes 1

− 2, 4 − 6)

Figure 11 Output Data Formats (Mode 3)

OUTPUT

FORMAT

MUXOP[1:0]

OUTPUT

PINS

OUTPUT

12-bit parallel

00

OP[11:0]

A = d11, d10, d9, d8, d7, d6, d5, d4, d3, d2, d1, d0

8+4-bit

multiplexed

01

OP[11:4]

A = d11, d10, d9, d8, d7, d6, d5, d4

B = d3, d2, d1, d0, PNS, CC[1], CC[0], OVRNG

6+6-bit

multiplexed

10

OP[11:4]

A = d11, d10, d9, d8, d7, d6, CC[1], CC[0]

B = d5, d4, d3, d2, d1, d0, PNS, OVRNG

4+4+4-bit

multiplexed

(nibble)

11

OP[11:8]

A = d11, d10, d9, d8

B = d7, d6, d5, d4

C = d3, d2, d1, d0

F = PNS, CC[1], CC[0], OVRNG

Table 1 Details of Output Data Shown in Figures 9 and 10

FLAGS

The following flags are output during multiplexed modes:

PNS indicates whether the control interface is operating in parallel or serial, 1 = parallel, 0 = serial.

CC[1] and CC[0] indicate from which input the current output was sampled:

INPUT

CC[1]

CC[0]

RINP

00

GINP

01

BINP

10

Table 2 Input Sampled Flags CC[1:0]

OVRNG indicates that the current output data was produced by an input signal that exceeded the

input range limit of the device. 1 = out of range, 0 = within range.