X24321

7

Acknowledge Polling

The maximum write cycle time can be significantly

reduced

using

Acknowledge

Polling. To

initiate

Acknowledge Polling, the master issues a start condi-

tion followed by the Slave Address Byte for a write or

read operation. If the device is still busy with the

nonvolatile write cycle, then no ACK will be returned. If

the device has completed the nonvolatile write opera-

tion, an ACK will be returned and the host can then

proceed with the read or write operation. Refer to

figure 6.

BYTE LOAD COMPLETED

BY ISSUING STOP.

ENTER ACK POLLING

ISSUE

START

ISSUE SLAVE

ADDRESS BYTE

(READ OR PROGRAM)

ACK

RETURNED?

NONVOLATILE

WRITE

CYCLE COMPLETE.

CONTINUE

SEQUENCE?

CONTINUE NORMAL

READ OR PROGRAM

COMMAND SEQUENCE

PROCEED

ISSUE STOP

NO

YES

YES

ISSUE STOP

NO

7040 FM 09

READ OPERATIONS

Read operations are initiated in the same manner as

write operations with the exception that the R/W bit of

the Slave Address Byte is set to one. There are three

basic

read

operations: Current

Address

Reads,

Random Reads, and Sequential Reads.

Current Address Read

Internally, the device contains an address counter that

maintains the address of the last byte read or written,

incremented by one. After a read operation from the

last address in the array, the counter will “roll over” to

the first address in the array. After a write operation to

the last address in a given page, the counter will “roll

over” to the first address of the same page.

Upon receipt of the Slave Address Byte with the R/W

bit set to one, the device issues an acknowledge and

then transmits the byte at the current address. The

master terminates the read operation when it does not

respond with an acknowledge during the ninth clock

and then issues a stop condition. Refer to figure 7 for

the

address,

acknowledge,

and

data

transfer

sequence.

It should be noted that the ninth clock cycle of the read

operation is not a “don’t care.” To terminate a read

operation, the master must either issue a stop condi-

tion during the ninth cycle or hold SDA HIGH during

the ninth clock cycle and then issue a stop condition.

FROM THE

S

T

A

R

T

SLAVE

ADDRESS

S

T

O

P

A

C

K

DATA

SIGNALS

FROM THE

MASTER

SDA BUS

SIGNALS

SLAVE

1

S

P

0 1 0

1

7040 FM 10

Figure 6. Acknowledge Polling Sequence

Figure 7. Current Address Read Sequence