X24640

5

Figure 4. Device Addressing

1

S1

S0

R/ W

DEVICE

SELECT

0

1

0

S 2

DEVICE TYPE

IDENTIFIER

SLAVE ADDRESS BYTE

D7

D2

D1

D6

D5

D4

D3

DATA BYTE

A2

A1

A0

A5

LOW ORDER WORD ADDRESS

A4

A3

WORD ADDRESS BYTE 0

0

A10

A9

A8

0

HIGH ORDER WORD ADDRESS

A11

X24640 WORD ADDRESS BYTE 1

0

A12

A7

A6

D0

7038 FM 06

DEVICE ADDRESSING

Following a start condition, the master must output the

address of the slave it is accessing. The first four bits

of the Slave Address Byte are the device type identifier

bits. These must equal “1010”. The next 3 bits are the

devices to share a single bus. These bits are

pins. The last bit of the Slave Address Byte defines the

operation to be performed. When the R/W bit is a one,

then a read operation is selected. When it is zero then

a write operation is selected. Refer to figure 4. After

loading the Slave Address Byte from the SDA bus, the

device compares the device type bits with the value

“1010” and the device select bits with the status of the

device select input pins. If the compare is not successful,

no acknowledge is output during the ninth clock cycle

and the device returns to the standby mode.

The word address is either supplied by the master or

obtained from an internal counter, depending on the

operation. The master must supply the two Word

Address Bytes as shown in figure 4.

32 bytes per page. The page address is partially

contained in the Word Address Byte 1 and partially in

bits 7 through 5 of the Word Address Byte 0. The byte

address is contained in bits 4 through 0 of the Word

Address Byte 0. See figure 4.