X88C64

1

© Xicor, Inc. 1994, 1995, 1996 Patents Pending

Characteristics subject to change without notice

3867-1.5 7/9/96 T0/C2/D0 NS

3867 FHD F02

8051 Microcontroller Family Compatible

DESCRIPTION

advanced CMOS Textured Poly Floating Gate Tech-

nology. The X88C64 features a Multiplexed Address

and Data bus allowing a direct interface to a variety of

popular single-chip microcontrollers operating in ex-

panded multiplexed mode without the need for addi-

tional interface circuitry.

The X88C64 is internally configured as two indepen-

dent 4K x 8 memory arrays. This feature provides the

ability to perform nonvolatile memory updates in one

array and continue operation out of code stored in the

other array; effectively eliminating the need for an

auxiliary memory device for code storage.

To write to the X88C64, a three-byte command

sequence must precede the byte(s) being written. The

X88C64 also provides a second generation software

data protection scheme called Block Protect. Block

Protect can provide write lockout of the entire device

or selected 1K blocks. There are eight 1K x 8 blocks

that can be write protected individually in any combi-

nation required by the user. Block Protect, in addition

to Write Control input, allows the different segments

of the memory to have varying degrees of alterability

in normal system operation.

FEATURES

—Dual Plane Architecture

—Isolates Read/Write Functions

Between Planes

—Allows Continuous Execution of Code

From One Plane While Writing in

the Other Plane

—Direct Interface to Popular 8051 Family

—Fast Access Time, 120ns

—Low Power

—60mA Active Maximum

—500

—Individually Set Write Lock Out in 1K Blocks

—Early End of Write Detection

—Allows up to 32 Bytes to be Written in

One Write Cycle

—Endurance: 100,000 Write Cycle

—Data Retention: 100 Years

CONTROL

LOGIC

SOFTWARE

DATA

PROTECT

CE

WR

RD

PSEN

A8–A11

ALE

L

A

T

C

H

E

S

D

E

C

O

D

E

A12

A12

M

U

X

1K BYTES

1K BYTES

1K BYTES

1K BYTES

Y DECODE

I/O & ADDRESS LATCHES AND BUFFERS

A/D0–A/D7

WC

1K BYTES

1K BYTES

1K BYTES

1K BYTES

A12

X

FUNCTIONAL DIAGRAM

SLIC

64K

X88C64

8192 x 8 Bit

A V AILABLE

AN63