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ADMP421ACEZ-RL 데이터시트(PDF) 4 Page - Analog Devices |
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ADMP421ACEZ-RL 데이터시트(HTML) 4 Page - Analog Devices |
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4 / 16 page ![]() ADMP421 Rev. 0 | Page 4 of 16 TIMING CHARACTERISTICS Table 2. Parameter Description Min Max Unit Input tCLKIN Input clock period 310 1000 ns Output t1OUTEN DATA1 driven after falling clock edge 30 ns t1OUTDIS DATA1 disabled after rising clock edge 20 ns t2OUTEN DATA2 driven after rising clock edge 30 ns t2OUTDIS DATA2 disabled after falling clock edge 20 ns Timing Diagram tCLKIN CLK DATA2 DATA1 t2OUTDIS t1OUTDIS t2OUTEN t1OUTEN Figure 2. Pulse Density-Modulated Output Timing |
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