X28C256

13

WRITE CYCLE LIMITS

Symbol

Parameter

Max.

Units

Write Cycle Time

5

10

ms

Address Setup Time

0

ns

Address Hold Time

150

ns

Write Setup Time

0

ns

Write Hold Time

0

ns

CE Pulse Width

100

ns

OE HIGH Setup Time

10

ns

OE HIGH Hold Time

10

ns

WE Pulse Width

100

ns

WE HIGH Recovery

50

ns

SDP

WE Recovery

1

µs

Data Valid

1

µs

Data Setup

50

ns

Data Hold

10

ns

Delay to Next Write

10

µs

Byte Load Cycle

1

100

µs

3855 PGM T11.1

WE Controlled Write Cycle

3855 FHD F06

time the device requires to automatically complete the internal write operation.

the three-byte SDP command sequence and before writing the first byte of data to the array. Refer to Figure 6 which illustrates

ADDRESS

tAS

tWC

tAH

tOES

tDV

tDS

tDH

tOEH

CE

WE

OE

DATA IN

DATA OUT

HIGH Z

DATA VALID

tCS

tCH

tWP