AM1808AZCED3 datasheet(72/264 Pages) TI

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OSCIN

RESET

RESETOUT

BootPins

Config

Power

Supplies

Ramping

PowerSuppliesStable

ClockSourceStable

TRST

AM1808

SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010

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6.4.3

Reset Electrical Data Timings

Table 6-1 assumes testing over the recommended operating conditions.

Table 6-1. Reset Timing Requirements ((1), (2))

1.3V, 1.2V

1.1V

1.0V

NO.

PARAMETER

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

tw(RSTL)

Pulse width, RESET/TRST low

100

tsu(BPV-RSTH)

Setup time, boot pins valid before RESET/TRST high

th(RSTH-BPV)

Hold time, boot pins valid after RESET/TRST high

td(RSTH-RESETOUTH) RESET high to RESETOUT high; Warm reset

cycles(3)

RESET high to RESETOUT high; Power-on Reset

td(RSTL-RESETOUTL) Delay time, RESET/TRST low to RESETOUT low

(1)

RESETOUT is multiplexed with other pin functions. See the Terminal Functions table, Table 3-3 for details.

(2)

For power-on reset (POR), the reset timings in this table refer to RESET and TRST together. For warm reset, the reset timings in this

table refer to RESET only (TRST is held high).

(3)

OSCIN cycles.

Figure 6-4. Power-On Reset (RESET and TRST active) Timing

Peripheral Information and Electrical Specifications

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