AM1808AZCE3 datasheet(11/264 Pages) TI

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AM1808

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SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010

3.3.5

Advanced High-Performance Bus (AHB)

The ARM Subsystem uses the AHB port of the ARM926EJ-S to connect the ARM to the Config bus and

the external memories. Arbiters are employed to arbitrate access to the separate D-AHB and I-AHB by the

Config Bus and the external memories bus.

3.3.6

Embedded Trace Macrocell (ETM) and Embedded Trace Buffer (ETB)

To support real-time trace, the ARM926EJ-S processor provides an interface to enable connection of an

Embedded Trace Macrocell (ETM). The ARM926ES-J Subsystem in the AM1808 also includes the

Embedded Trace Buffer (ETB). The ETM consists of two parts:

•

Trace Port provides real-time trace capability for the ARM9.

•

Triggering facilities provide trigger resources, which include address and data comparators, counter,

and sequencers.

The AM1808 trace port is not pinned out and is instead only connected to the Embedded Trace Buffer.

The ETB has a 4KB buffer memory. ETB enabled debug tools are required to read/interpret the captured

trace data.

3.3.7

ARM Memory Mapping

By default the ARM has access to most on and off chip memory areas, including EMIFA, DDR2, and the

additional 128K byte on chip SRAM. Likewise almost all of the on chip peripherals are accessible to the

ARM by default.

See Table 3-2 for a detailed top level device memory map that includes the ARM memory space.

Device Overview

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