ADC0804S040TS datasheet(4/19 Pages) NXP

4 / 19 page

ADC0804S030_040_050_2

Product data sheet

Rev. 02 — 14 August 2008

4 of 19

NXP Semiconductors

ADC0804S030/040/050

Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz

Pinning information

7.1 Pinning

7.2 Pin description

Fig 2.

Pin conﬁguration

ADC0804S

030TS

CLK

VCCD1

DGND1

VCCA

AGND

n.c.

VCCD2

DGND2

n.c.

VCCO

n.c.

OGND

n.c.

014aaa551

Table 3.

Pin description

Symbol

Description

CLK

clock input

two’s complement input (active LOW)

VCCA

analog supply voltage (5 V)

AGND

analog ground

n.c.

not connected

reference voltage BOTTOM input

reference voltage MIDDLE

analog input voltage

reference voltage TOP input

output enable input (CMOS level input, active LOW)

VCCD2

digital supply voltage 2 (5 V)

DGND2

digital ground 2

VCCO

supply voltage for output stages (3 V to 5 V)

OGND

output ground

n.c.

not connected

n.c.

not connected

n.c.

not connected

data output; bit 0 (Least Signiﬁcant Bit (LSB))

data output; bit 1

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