| 전자부품 데이터시트 검색엔진 |
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CS8130-CS 데이터시트(PDF) 16 Page - Cirrus Logic |
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CS8130-CS 데이터시트(HTML) 16 Page - Cirrus Logic |
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16 / 28 page ![]() Register 5, Receive Mode Register D3 D2 D1 D0 RTVR RMOD RWIDS RWIDL 0011 Register Reset (R) BIT NAME VALUE FUNCTION RTVR, RMOD, RWIDS, RWIDL Receive Mode 0000 0001 0010 0011 0100 1000 1100 0 1 2 3R 4 8 12 Mode 2 Amplitude modulated carrier mode Mode 1a IRDA - fixed 1.6 µs pulse Mode 1b IRDA - variable 3/16 bit cell time pulse Mode 1c IRDA - Any width pulse from 1.6 µs to 3/16 bit cell time Mode 4 Direct access mode Mode 3 TV remote mode, oversampling receive Mode 3 TV remote mode, timed bit cell receive All other combinations are reserved Register 6, Receive Sensitivity Register #1 D3 D2 D1 D0 RS3 RS2 RS1 RS0 0111 Register Reset (R) BIT NAME VALUE FUNCTION RS4-0 Receive threshold setting. 00000 00001 " 00111 " 11110 11111 0 1 " 7R " 30 31 7.8 nA nominal receive threshold 15.6 nA nominal receive threshold " 62.5 nA nominal receive threshold " 242.2 nA nominal receive threshold 250 nA nominal receive threshold Threshold settings of less than 20nA should not be used because background noise will cause the apparent occurrence of constant signal. Register 7, Receive Sensitivity Register #2 D3 D2 D1 D0 00 0 RS4 0000 Register Reset (R) CS8130 16 DS134PP2 CS8130 16 DS134F1 |
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