전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CS8427-CSZ 데이터시트(PDF) 26 Page - Cirrus Logic

부품명 CS8427-CSZ
상세설명  96 kHz Digital Audio Interface Transceiver
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS8427-CSZ 데이터시트(HTML) 26 Page - Cirrus Logic

Back Button CS8427-CSZ Datasheet HTML 22Page - Cirrus Logic CS8427-CSZ Datasheet HTML 23Page - Cirrus Logic CS8427-CSZ Datasheet HTML 24Page - Cirrus Logic CS8427-CSZ Datasheet HTML 25Page - Cirrus Logic CS8427-CSZ Datasheet HTML 26Page - Cirrus Logic CS8427-CSZ Datasheet HTML 27Page - Cirrus Logic CS8427-CSZ Datasheet HTML 28Page - Cirrus Logic CS8427-CSZ Datasheet HTML 29Page - Cirrus Logic CS8427-CSZ Datasheet HTML 30Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 60 page
background image
CS8427
26
DS477F5
mode is used for active-low, wired-OR hook-ups
with multiple peripherals connected to the micro-
controller interrupt input pin.
Many conditions can cause an interrupt, as listed in
the interrupt status register descriptions. Each
source may be masked off using mask register
bits. In addition, each source may be set to rising
edge, falling edge, or level-sensitive. Combined
with the option of level-sensitive or edge-sensitive
modes within the microcontroller, many different
set-ups are possible depending on the needs of
the equipment designer.
MA P
MSB
LSB
DATA
by te 1
by te n
R/W
R/W
AD D R E S S
CH IP
ADDRESS
CH IP
CD IN
CC L K
CS
CD OU T
MSB
LSB MSB
LSB
0010000
0010000
MAP = Memory Address Pointer, 8 bits, MSB first
High Impedance
Figure 17. Control Port Timing in SPI Mode
SDA
SCL
0010
AD2-0
R/W
Start
ACK DATA7-0 ACK DATA7-0 ACK
Stop
Note 2
Note 1
Note 1: AD2 is derived from a resistor attached to the EMPH pin,
Note 2: If operation is a write, this byte contains the Memory Address Pointer, MAP
AD1 and AD0 are determined by the state of the corresponding pins
Note 3: If operation is a read, the last bit of the read should be a NACK(high)
Note 3
Figure 18. Control Port Timing in I²C Mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com