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SWR200 데이터시트(PDF) 4 Page - Cirrus Logic |
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SWR200 데이터시트(HTML) 4 Page - Cirrus Logic |
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4 / 5 page ![]() SWR200 4 SWR200DS P r o d u c t I n n o v a t i o n F r o m 3. THEORY OF OPERATION The following refers to the schematic in Figure 1. A1 and A2 are connected as a phase-shift oscillator circuit with the frequency set by the external capacitors C1 and C2. Q4 is included in the feedback loop of A1 as a gain control element. The oscillator output is fed to the chopper amplifier which develops an absolute value representation of the oscillator output. The chopper output is compared to a precision DC reference in integrator amplifier A3. This DC error signal is used ot control the gain setting FET Q4. As in all precision zener based DC references, the drift of the zener becomes nonlinear at temperature extremes. The chopper amplifier drift characteristic is complementary to this nonlinearity and compensates for the reference drift. 4. APPLICATION INFORMATION Figure 1 shows the connections for the SWR200 including the two frequency setting capacitors. The frequency is: f = 10-5 C 1 C2 The frequency stability is directly related to the stability of the capacitors, therefore stable capacitors like NPO ce- ramic, or polycarbonate or polystyrene film should be used. Two separate ground pins are provided for accurate ground sensing. This minimizes errors due to drops in the ground pin which can become a significant source of error in sockets. The offset of the SWR200 is fully specified for initial offset and drift and is low enough that it can normally be ne- glected. In applications which are especially sensitive to offset the output can be AC coupled. Proper capacitor siz- ing and high impedance sensing will minimize errors due to capacitive coupling. EXTERNAL CONNECTIONS PIN CONFIGURATION TOP VIEW SWR200 NC NC OUTPUT GND SENSE GND NC NC NC C1 C1 -PS C2 +PS C2 |
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