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P89LPC9321 데이터시트(PDF) 45 Page - NXP Semiconductors |
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P89LPC9321 데이터시트(HTML) 45 Page - NXP Semiconductors |
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45 / 70 page ![]() P89LPC9321_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 9 December 2008 45 of 70 NXP Semiconductors P89LPC9321 8-bit microcontroller with accelerated two-clock 80C51 core 7.29 Additional features 7.29.1 Software reset The SRST bit in AUXR1 gives software the opportunity to reset the processor completely, as if an external reset or watchdog reset had occurred. Care should be taken when writing to AUXR1 to avoid accidental software resets. 7.29.2 Dual data pointers The dual Data Pointers (DPTR) provides two different Data Pointers to specify the address used with certain instructions. The DPS bit in the AUXR1 register selects one of the two Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register, without the possibility of inadvertently altering other bits in the register. 7.29.3 Data EEPROM The P89LPC9321 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides 100,000 minimum erase/program cycles for each byte. • Byte mode: In this mode, data can be read and written one byte at a time. • Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The entire row can be erased by writing 00H. • Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector can be erased by writing 00H. (1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a feed sequence. Fig 20. Watchdog timer in Watchdog mode (WDTE = 1) PRE2 PRE1 PRE0 - - WDRUN WDTOF WDCLK WDCON (A7H) SHADOW REGISTER PRESCALER 002aae015 8-BIT DOWN COUNTER WDL (C1H) watchdog oscillator external crystal oscillator PCLK XTALWD ÷32 0 1 0 1 MOV WFEED1, #0A5H MOV WFEED2, #05AH reset(1) |
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