PCA9505_9506_3

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 03 — 6 June 2007

7 of 31

NXP Semiconductors

PCA9505/06

[1]

be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board

level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad

on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the

printed-circuit board in the thermal pad region.

7.

Functional description

Refer to Figure 1 “Block diagram of PCA9505/06” and Figure 2 “Simplified schematic of

IO0_0 to IO4_7”.

7.1 Device address

Following a START condition, the bus master must send the address of the slave it is

accessing and the operation it wants to perform (read or write). The address of the

PCA9505/06 is shown in Figure 5. Slave address pins A2, A1, and A0 choose 1 of 8 slave

pull-up resistors are incorporated on A2, A1, and A0.

The last bit of the first byte defines the operation to be performed. When set to logic 1 a

read is selected, while a logic 0 selects a write operation.

7.2 Command register

Following the successful acknowledgement of the slave address + R/W bit, the bus master

will send a byte to the PCA9505/06, which will be stored in the Command register.

OE

30

23

I

active LOW output enable input

INT

55

48

O

active LOW interrupt output

RESET

56

49

I

active LOW reset input

Table 2.

Symbol

Pin

Type

Description

TSSOP56

HVQFN56

Fig 5.

PCA9505/06 address

002aab494

0

1

0

0

A2

A1

A0 R/W

fixed

slave address

programmable

Fig 6.

Command register

002aab495

1

0

0

0

0

0

0

0

AI

−

D5

D4

D3

D2

D1

D0

Auto-Increment

register number

default at power-up

or after RESET