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PCA9633DP2 데이터시트(PDF) 16 Page - NXP Semiconductors

부품명 PCA9633DP2
상세설명  4-bit Fm I2C-bus LED driver
PDF  43 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9633DP2 데이터시트(HTML) 16 Page - NXP Semiconductors

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PCA9633_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 25 July 2008
16 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I2C-bus LED driver
7.4 Active LOW output enable input
The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at
the same time.
This control signal is only available for the 16-pin version and does not apply to the 8-pin
or 10-pin versions.
• When a LOW level is applied to OE pin, all the LED outputs are enabled and follow the
output state defined in the LEDOUT register with the polarity defined by INVRT bit
(MODE2 register).
• When a HIGH level is applied to OE pin, all the LED outputs are programmed to the
value that is defined by OUTNE[1:0] in the MODE2 register.
The OE pin can be used as a synchronization signal to switch on/off several PCA9633
devices at the same time. This requires an external clock reference that provides blinking
period and the duty cycle.
The OE pin can also be used as an external dimming control signal. The frequency of the
external clock must be high enough not to be seen by the human eye, and the duty cycle
value determines the brightness of the LEDs.
Remark: Do not use OE as an external blinking control signal when internal global
blinking is selected (DMBLNK = 1, MODE2 register) since it will result in an undefined
blinking pattern. Do not use OE as an external dimming control signal when internal global
dimming is selected (DMBLNK = 0, MODE2 register) since it will result in an undefined
dimming pattern.
7.5 Power-on reset
When power is applied to VDD, an internal Power-on reset holds the PCA9633 in a reset
condition until VDD has reached VPOR. At this point, the reset condition is released and the
PCA9633 registers and I2C-bus state machine are initialized to their default states (all
zeroes) causing all the channels to be deselected. Thereafter, VDD must be lowered below
0.2 V to reset the device.
Table 16.
LED outputs when OE=1
OUTNE1
OUTNE0
LED outputs
000
0
1
1 if OUTDRV = 1, high-impedance if OUTDRV = 0
1
0
high-impedance
1
1
reserved



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