YEV09T06 6A DC-DC POL Converter

Data Sheet

ZD-02094 Rev 1.1, 25-Mar-09

www.power-one.com

Page 8 of 12

6.

Application Information

6.1

Input and Output Impedance

The POL converter should be connected to the DC

power source via low impedance.

In many

applications, the inductance associated with the

distribution from the power source to the input of the

converter can affect the stability of the converter.

Internally, the converter includes 4.7μF (low ESR

ceramics) of input capacitance which eliminates the

need for external input capacitance. However, if the

distribution of the input voltage to the POL converter

contains high inductance, it is recommended to add

a 100μF decoupling capacitor placed as close as

possible to the converter input pins.

A low-ESR

tantalum or POS capacitor connected across the

input pins help ensuring stability of the POL

converter and reduce input ripple voltage.

A 22μF ceramic output capacitor is recommended to

improve output ripple and dynamic response.

It is important to keep low resistance and low

inductance of PCB traces for connecting load to the

output pins of the converter in order to maintain good

load regulation.

6.2

Output Voltage Programming

The output voltage can be programmed from 0.59V

between TRIM pin (Pin 5) and GND pin (Pin 3), as

shown in Figure 14.

Figure 14. Programming Output Voltage With A Resistor

can be calculated using the following equation:

,

591

.

0

182

.

1





OUT

TRIM

V

R

kΩ

where:

converter will be 0.591V.

Note that the trim resistor tolerance directly affects

the output voltage accuracy. It is recommended to

use ±0.1% trim resistors to meet the output voltage

setpoint accuracy specified in p. 4.2.

Table 1. Trim Resistor Values

Calculated

Standard Value of

0.1% Resistor, kΩ

0.8

5.65

5.62

1.2

1.94

1.93

1.5

1.3

1.30

1.8

0.98

0.976

2.5

0.62

0.619

3.3

0.44

0.437

5.0

0.27

0.267

6.3

ON/OFF (Pin 1)

The ON/OFF pin is used to turn the POL converter

ON or OFF remotely by a signal from a system

controller. For positive logic, the POL converter is

ON when the ON/OFF pin is at a logic high (2.4V

min) or left open. The POL converter is OFF when

the ON/OFF pin is at a logic low (0.4V max) or

connected to GND.

The ON/OFF pin should be controlled with an open

collector transistor as shown in Figure 15.

Figure 15. Circuit Configuration For ON/OFF Function

VIN

GND

ON/OFF

VOUT

3

2

4

1

TRIM

5

Rload

YEV09T06

CONTROL

INPUT

VIN

GND

ON/OFF

VOUT

3

2

4

1

TRIM

5

Rload

INPUT

VOLTAGE

4.32k

Internal

Enable

Circuit

YEV09T06