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STM6600 데이터시트(PDF) 41 Page - STMicroelectronics |
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STM6600 데이터시트(HTML) 41 Page - STMicroelectronics |
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41 / 51 page ![]() STM6600 - STM6601 DC and AC characteristics Doc ID 15453 Rev 7 41/51 CSRD ISRD CSRD charging current 100 150 200 nA VSRD CSRD voltage threshold VCC = 3.6 V, load on VREF pin 100 k Ω and mandatory 1 µF capacitor, TA = 25 °C 1.5 V tSRD Additional Smart Reset™ delay time External CSRD connected 10 s/µF EN, EN VOL Output low voltage VCC = 2 V, ISINK = 1 mA, enable asserted 0.3 V VOH (5) Output high voltage VCC = 2 V, ISOURCE = 1 mA, enable asserted VCC – 0.3 V tEN_OFF (6) enable off to enable on VCC ≥ 2.0 V40 64 88 ms EN, EN leakage current VEN = 2 V, enable open drain –0.1 +0.1 µA RST VOL Output low voltage VCC = 2 V, ISINK = 1 mA, RST asserted 0.3 V tREC RST pulse width VCC ≥ 2.0 V 240 360 480 ms RST leakage current VRST = 3V –0.1 +0.1 µA INT VOL Output low voltage VCC = 2 V, ISINK = 1 mA, INT asserted 0.3 V tINT_Min Minimum INT pulse width VCC ≥ 2.0 V20 32 44 ms INT leakage current VINT = 3 V –0.1 +0.1 µA VREF VREF 1.5 V voltage reference VCC = 3.6 V, load on VREF pin 100 k Ω and mandatory 1 µF capacitor, TA = 25 °C 1.485 –1% 1.5 1.515 +1% V 1. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 1.6 V to 5.5 V (except where noted). 2. Typical values are at TA = +25 °C. 3. This blanking time allows the processor to start up correctly (see Figure 7, 8, 9, 10, 11, 12). 4. The internal pull-up resistor connected to the SR input is optional (see Table 10 for detailed device options). 5. Valid for push-pull only. 6. Minimal delay between enable off and enable on allows the application to power down properly. PB is ignored during this period. Table 5. DC and AC characteristics (continued) Symbol Parameter Test condition(1) Min. Typ.(2) Max. Unit |
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