TDA9983BHWSLASH8SLASHC1 datasheet(43/119 Pages) NXP

43 / 119 page

TDA9983B_1

Product data sheet

Rev. 01 — 20 May 2008

43 of 119

NXP Semiconductors

TDA9983B

150 MHz pixel rate HDMI transmitter

9.3.10 Current page address register

9.4 Scaler page register deﬁnitions

The current page address for the Scaler page is 01h.

The conﬁguration of the registers for this page is given in Table 51.

F2h

TRAIL_OFF

7 to 4

0000*

undeﬁned

3 to 0

TRAIL_OFFSET[3:0]

0010*

trailing offset: trailing offset for dwin (in

case rpt > 1)

F9h

GHOST_XADDR

7 to 1

GHOST_XADDR[6:0] W

0110

000*

ghost extended address

A0_ZERO

FDh

AIP_CLKSEL

7 to 5

000*

undeﬁned

4 to 3

SEL_AIP[1:0]

selection audio input

00*

S/PDIF

I2S-bus

for internal use

SEL_POL_CLK

select polarity clock: for internal use

1 to 0

SEL_FS[1:0]

select fs: CTS reference

00*

aclk

mclk

fs_64 (S/PDIF)

FEh

GHOST_ADDR

7 to 1

GHOST_ADDR[6:0]

1010

000*

ghost address

GHOST_DIS

Table 49.

Control registers (address F0h to F2h, F9h, FDh and FEh) bit description …continued

Legend: * = default value

Address

Bit

Symbol

Access Value

Description

Table 50.

CURPAGE_ADR register (address FFh) bit description

Legend: * = default value

Bit

Symbol

Access

Value

Description

7 to 0

CURPAGE_ADR[7:0]

00h*

current page address: selects the

current memory page

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