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STM6600ES24DM6F 데이터시트(PDF) 24 Page - STMicroelectronics |
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STM6600ES24DM6F 데이터시트(HTML) 24 Page - STMicroelectronics |
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24 / 51 page ![]() Waveforms STM6600 - STM6601 24/51 Doc ID 15453 Rev 7 Figure 18. Long push (option with RST assertion) 1. tSRD period is set by external capacitor CSRD. 2. PB ignored during tINT_Min. 3. PSHOLD signal is ignored during tON_BLANK. Its level is checked after tON_BLANK expires and if it is high the EN signal remains asserted, otherwise EN goes low. 4. Internal pull-down resistor 300 k Ω is connected to PS HOLD input during startup when device is reset. internal pull-down resistor connected to PS HOLD input PS HOLD ignored PB status ignored tON_BLANK tSRD (1) set by CSRD VCC undervoltage detection status ignored PB PS HOLD (3, 4) INT (2) RST Push-button pressed and PB connected to GND tDEBOUNCE tREC Push-button held even after tSRD expires therefore RST is asserted INT can go high, if PB goes high, but system freezes and processor won’t respond if system freezes, processor won’t respond to any INT status change t INT_Min tDEBOUNCE After tON_BLANK PB is monitored for falling edge t ON_BLANK expires PS HOLD state detected as high therefore EN remains high (valid for STM6600 and STM6601) SR AM00252v2 Note: EN is high. |
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