25LC512-ESLASHP datasheet(15/36 Pages) MICROCHIP

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DS22065C-page 15

25LC512

2.9

SECTOR ERASE

The SECTOR

ERASE instruction will erase all bits

(FFh) inside the given sector. A Write Enable (WREN)

instruction must be given prior to attempting a SECTOR

ERASE. This is done by setting CS low and then clock-

ing out the proper instruction into the 25LC512. After

all eight bits of the instruction are transmitted, the CS

must be brought high to set the write enable latch.

The SECTOR ERASE instruction is entered by driving

CS low, followed by the instruction code (Figure 2-9)

and two address bytes. Any address inside the sector

to be erased is a valid address.

CS must then be driven high after the last bit of the

address or the SECTOR ERASE will not execute. Once

the CS is driven high the self-timed SECTOR ERASE

cycle is started. The WIP bit in the STATUS register

can be read to determine when the SECTOR ERASE

cycle is complete.

If a SECTOR ERASE instruction is given to an address

that has been protected by the Block Protect bits (BP0,

BP1) then the sequence will be aborted and no erase

will occur.

See Table 2-3 for Sector Addressing.

FIGURE 2-9:

SECTOR ERASE SEQUENCE

SCK

23456789 10 11

21 22 23

15 14 13 12

210

Instruction

16-bit Address

High-Impedance

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