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PIC16F1826-E/ML 데이터시트(PDF) 97 Page - Microchip Technology

부품명 PIC16F1826-E/ML
상세설명  18/20/28-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  406 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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PIC16F1826-E/ML 데이터시트(HTML) 97 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41391C-page 97
PIC16F/LF1826/27
8.5.7
PIR2 REGISTER
The PIR2 register contains the interrupt flag bits, as
shown in Register 8-7.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
software
should
ensure
the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 8-7:
PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
U-0
U-0
R/W-0/0
OSFIF
C2IF
C1IF
EEIF
BCL1IF
—
—CCP2IF(1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
OSFIF: Oscillator Fail Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 6
C2IF: Comparator C2 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 5
C1IF: Comparator C1 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 4
EEIF: EEPROM Write Completion Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 3
BCL1IF: MSSP1 Bus Collision Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 2-1
Unimplemented: Read as ‘0’
bit 0
CCP2IF: CCP2 Interrupt Flag bit(1)
1 = Interrupt is pending
0 = Interrupt is not pending
Note 1:
PIC16F/LF1827 only.



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