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PIC16F722AT-I/SP 데이터시트(PDF) 21 Page - Microchip Technology

부품명 PIC16F722AT-I/SP
상세설명  28-Pin Flash Microcontrollers with nanoWatt XLP Technology
PDF  284 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F722AT-I/SP 데이터시트(HTML) 21 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS41417A-page 21
PIC16F/LF722A/723A
Bank 2
100h(2)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
26,34
101h
TMR0
Timer0 Module Register
xxxx xxxx
99,34
102h(2)
PCL
Program Counter’s (PC) Least Significant Byte
0000 0000
25,34
103h(2)
STATUS
IRP
RP1
RP0
TO
PD
ZDC
C
0001 1xxx
22,34
104h(2)
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
26,34
105h
—
Unimplemented
—
—
106h
—
Unimplemented
—
—
107h
—
Unimplemented
—
—
108h
CPSCON0
CPSON
—
—
—
CPSRNG1 CPSRNG0
CPSOUT
T0XCS
0--- 0000
121,35
109h
CPSCON1
—
—
—
—
CPSCH3
CPSCH2
CPSCH1
CPSCH0
---- 0000
122,35
10Ah(1, 2) PCLATH
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
25,34
10Bh(2)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
40,34
10Ch
PMDATL
Program Memory Read Data Register Low Byte
xxxx xxxx
177,35
10Dh
PMADRL
Program Memory Read Address Register Low Byte
xxxx xxxx
177,35
10Eh
PMDATH
—
—
Program Memory Read Data Register High Byte
--xx xxxx
177,35
10Fh
PMADRH
—
—
—
Program Memory Read Address Register High Byte
---x xxxx
177,35
Bank 3
180h(2)
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
xxxx xxxx
26,34
181h
OPTION_REG
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
23,35
182h(2)
PCL
Program Counter (PC) Least Significant Byte
0000 0000
25,34
183h(2)
STATUS
IRP
RP1
RP0
TO
PD
ZDC
C
0001 1xxx
22,34
184h(2)
FSR
Indirect Data Memory Address Pointer
xxxx xxxx
26,34
185h
ANSELA
—
—
ANSA5
ANSA4
ANSA3
ANSA2
ANSA1
ANSA0
--11 1111
49,35
186h
ANSELB
—
—
ANSB5
ANSB4
ANSB3
ANSB2
ANSB1
ANSB0
--11 1111
58,35
187h
—
Unimplemented
—
—
18Ah(1, 2) PCLATH
—
—
—
Write Buffer for the upper 5 bits of the Program Counter
---0 0000
25,34
18Bh(2)
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
40,34
18Ch
PMCON1
Reserved
—
—
—
—
—
—RD
1--- ---0
178,35
18Dh
—
Unimplemented
—
—
18Eh
—
Unimplemented
—
—
18Fh
—
Unimplemented
—
—
TABLE 2-1:
PIC16F/LF722A/723A SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Page
Legend:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note
1:
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are
transferred to the upper byte of the program counter.
2:
These registers can be addressed from any bank.
3:
Accessible only when SSPM<3:0> = 1001.
4:
Accessible only when SSPM<3:0>
 1001.
5:
This bit is always ‘1’ as RE3 is input only.



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