PIC16F722-ESLASHML datasheet(51/302 Pages) MICROCHIP

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DS41341E-page 51

PIC16F72X/PIC16LF72X

5.0

LOW DROPOUT (LDO)

VOLTAGE REGULATOR

The PIC16F72X devices differ from the PIC16LF72X

devices due to an internal Low Dropout (LDO) voltage

regulator. The PIC16F72X contain an internal LDO,

while the PIC16LF72X do not.

The lithography of the die allows a maximum operating

voltage of 3.6V on the internal digital logic. In order to

continue to support 5.0V designs, a LDO voltage

regulator is integrated on the die. The LDO voltage

regulator allows for the internal digital logic to operate

at 3.2V, while I/O’s operate at 5.0V (VDD).

The LDO voltage regulator requires an external bypass

capacitor for stability. One of three pins, denoted as

VCAP, can be configured for the external bypass

capacitor. It is recommended that the capacitor be a

ceramic cap between 0.1 to 1.0 µF. The VCAP pin is not

intended to supply power to external loads. An external

voltage regulator should be used if this functionality is

required. In addition, external devices should not

supply power to the VCAP pin.

On power-up, the external capacitor will look like a

large load on the LDO voltage regulator. To prevent

erroneous operation, the device is held in Reset while

a constant current source charges the external

capacitor. After the cap is fully charged, the device is

released from Reset. For more information, refer to

Section 23.0 “Electrical Specifications”.

See Configuration Word 2 register (Register 8-2) for

VCAP enable bits.

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