PIC16F883-ESLASHML datasheet(61/328 Pages) MICROCHIP

61 / 328 page

DS41291F-page 59

PIC16F882/883/884/886/887

3.7

PORTE and TRISE Registers

PORTE(1) is a 4-bit wide, bidirectional port. The

corresponding data direction register is TRISE. Setting a

TRISE bit (= 1) will make the corresponding PORTE pin

an input (i.e., put the corresponding output driver in a

High-Impedance mode). Clearing a TRISE bit (= 0) will

make the corresponding PORTE pin an output (i.e.,

enable the output driver and put the contents of the

output latch on the selected pin). The exception is RE3,

which is input only and its TRIS bit will always read as

‘1’. Example 3-6 shows how to initialize PORTE.

Reading the PORTE register (Register 3-13) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then

written to the PORT data latch. RE3 reads ‘0’ when

MCLRE = 1.

The TRISE register (Register 3-14) controls the PORTE

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISE register are maintained set when using them as

analog inputs. I/O pins configured as analog input always

read ‘0’.

EXAMPLE 3-6:

INITIALIZING PORTE

Note 1: RE<2:0>

pins

are

available

PIC16F884/887 only.

Note:

The ANSEL register must be initialized to

configure an analog channel as a digital

input. Pins configured as analog inputs will

read ‘0’.

BANKSEL PORTE

;

CLRF

PORTE

;Init PORTE

BANKSEL ANSEL

;

CLRF

ANSEL

;digital I/O

BCF

STATUS,RP1

;Bank 1

BANKSEL TRISE

;

MOVLW

B‘00001100’

;Set RE<3:2> as inputs

MOVWF

TRISE

;and set RE<1:0>

;as outputs

PORTE: PORTE REGISTER

U-0

R-x

R/W-x

—

RE3

RE2

RE1

RE0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-4

Unimplemented: Read as ‘0’

bit 3-0

RD<3:0>: PORTE General Purpose I/O Pin bit

= Port pin is > VIH

= Port pin is < VIL

TRISE: PORTE TRI-STATE REGISTER

U-0

R-1(1)

R/W-1

—

TRISE3

TRISE2

TRISE1

TRISE0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-4

Unimplemented: Read as ‘0’

bit 3-0

TRISE<3:0>: PORTE Tri-State Control bit

= PORTE pin configured as an input (tri-stated)

= PORTE pin configured as an output

Note 1:

TRISE<3> always reads ‘1’.

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