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PCA9534A 데이터시트(PDF) 25 Page - Texas Instruments

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부품명 PCA9534A
상세설명  REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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PCA9534A 데이터시트(HTML) 25 Page - Texas Instruments

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PCA9534A
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SCPS141F – SEPTEMBER 2006 – REVISED JUNE 2010
Figure 20. VPOR
Interrupt Requirements
The expected performance of the interrupt feature is that INT is to be cleared (de-asserted) when the input
register is read or all inputs return to the last read values. INT is also de-asserted when both of the following
occur:
•
The last I2C command byte (register pointer) written was 00h. This generally means the last operation with
the device was a read of the input register, but the command byte may have been written with 00h without
ever going on to read the Input register.
•
Any other slave device on the I2C bus acknowledges an address byte with the R/W bit set high. This occurs
when reading any other valid device on the bus.
In order to prevent INT from de-asserting when another device is read on the I2C bus, the user needs to change
the command byte to something other than 00 (hex) after a read operation to the device.
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