| 전자부품 데이터시트 검색엔진 |
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CS4354-CSZ 데이터시트(PDF) 6 Page - Cirrus Logic |
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CS4354-CSZ 데이터시트(HTML) 6 Page - Cirrus Logic |
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6 / 25 page ![]() 6 DS895A2 CS4354 DAC ANALOG CHARACTERISTICS Test conditions (unless otherwise specified): TA = 25 °C; VA = 5 V, VL = 3.3 V; GND = 0 V; FILT+, -VFILT, and FLYP/N capacitors as shown in Figure 5 on page 12; input test signal is a 997 Hz sine wave at 0 dBFS; measure- ment bandwidth 20 Hz to 20 kHz. Notes: 3. Measured at the output of the external low-pass filter on AOUTx as shown in Figure 5 on page 12. 4. Measured between the AOUTx and GND pins. 5. One LSB of triangular PDF dither is added to data. 6. Does not include attenuation due to ZOUT. Additional impedance between the AOUTx pin and the load will lower the voltage delivered to the load. 7. VPP is the controlling specification. VRMS specification valid for sine wave signals only. Note that for sine wave signals: Parameter Symbol Min Typ Max Unit Dynamic Performance, Fs = 48, 96, and 192 kHz (Notes 3, 5) Dynamic Range 24-bit A-Weighted unweighted 16-bit A-Weighted unweighted 95 92 - - 101 98 96 93 - - - - dB dB dB dB Total Harmonic Distortion + Noise 24-bit 0 dB -20 dB -60 dB 16-bit 0 dB -20 dB -60 dB THD+N - - - - - - -86 -78 -38 -86 -73 -33 -80 -72 -32 - - - dB dB dB dB dB dB Idle Channel Noise / Signal-to-Noise Ratio (A-wt) - 101 - dB Interchannel Isolation (1 kHz) - 100 - dB Analog Output (Note 4) Full Scale AOUTx Output Voltage (Notes 6, 7) 0.38•VA 0.40•VA 0.42•VA VRMS 1.07•VA 1.13•VA 1.19•VA Vpp Interchannel Gain Mismatch - 0.1 - dB Output Offset - ±1 ±8 mV Gain Drift - 100 - ppm/°C Output Impedance ZOUT -100 - Load Resistance RL 3- - k Load Capacitance CL -- 100 pF VRMS Vpp 22 ----------- = |
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