ADT7473 datasheet(9/74 Pages) ONSEMI

9 / 74 page

ADT7473

http://onsemi.com

Figure 12. ADT7473 Configuration

TACH2

PWM3

TACH3

D1+

D1–

GND

ADT7473

SCL

SDA

TACH1

PWM1

CPU FAN

AMBIENT

TEMPERATURE

SMBALERT

D2+

D2–

THERM

PROCHOT

FRONT

CHASSIS

FAN

REAR

CHASSIS

FAN

CPU

ICH

Serial Bus Interface

On PCs and servers, control of the ADT7473/ADT7473−1

is carried out using the SMBus. The ADT7473/ADT7473−1

is connected to this bus as a slave device, under the control of

a master controller, which is usually (but not necessarily) the

ICH.

The ADT7473 has a fixed 7−bit serial bus address of

0101110 or 0x2E. The read/write bit must be added to get the

8−bit address (01011100 or 0x5C). When the ADT7473−1

is powered up with Pin 8 (PWM3/ADDREN) high, the

ADT7473−1 has a default SMBus address of 0101110 or

0x2E. If more than one ADT7473−1 is used in a system,

each ADT7473−1 is placed in ADDR SELECT mode by

strapping Pin 8 low on powerup. The logic state of Pin 4 then

determines the device’s SMBus address. The logic of these

pins is sampled on powerup.

The device address is sampled on powerup and latched on

the first valid SMBus transaction, more precisely on the

low−to−high transition at the beginning of the eighth SCL

pulse, when the serial bus address byte matches the selected

slave address. The selected slave address is chosen using the

ADDREN pin/ADDR SELECT pin. Any attempted change

in the address has no effect after this.

Table 3. Hardwiring the ADT7473−1 SMBus Device

Address

Pin 13 State

Pin 14 State

Address

Low (10 kW to GND)

0101100 (0x2C)

High (10 kW pullup)

0101101 (0x2D)

Don’t care

0101110 (0x2E)

Figure 13. Default SMBus Address = 0x2E

ADT7473−1

ADDRESS = 0x2E

VCC

ADDR SELECT

PWM3/ADDREN

10kΩ

Figure 14. SMBus Address = 0x2C (Pin4 = 0)

ADT7473−1

ADDRESS = 0x2C

10kΩ

ADDR SELECT

PWM3/ADDREN

Figure 15. SMBus Address = 0x2D (Pin 4 = 1)

ADT7473−1

ADDRESS = 0x2D

VCC

10kΩ

ADDR SELECT

PWM3/ADDREN

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