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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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68HC705SP7 데이터시트(PDF) 145 Page - Freescale Semiconductor, Inc |
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68HC705SP7 데이터시트(HTML) 145 Page - Freescale Semiconductor, Inc |
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145 / 230 page  Simple Serial Interface SIOP Registers MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0 General Release Specification Simple Serial Interface 9.4.3 SIOP Data Register (SDR) The SIOP data register (SDR) is located at address $000C and serves as both the transmit and receive data register. Writing to this register will initiate a message transmission if the node is in master mode. The SIOP subsystem is not double buffered and any write to this register will destroy the previous contents. The SDR can be read at any time. However, if a transfer is in progress the results may be ambiguous. Writing to the SDR while a transfer is in progress can cause invalid data to be transmitted and/or received. Figure 9-6 shows the position of each bit in the register. This register is not affected by reset. $000C Bit 7 654321 Bit 0 Read: Bit 7 654321 Bit 0 Write: Reset: Unaffected by Reset Figure 9-6. SIOP Data Register (SDR) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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