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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 219 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 219 Page - Freescale Semiconductor, Inc |
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219 / 1348 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 219 Operation RD + $00:IMM8 ⇒ RD Adds the content of register RD and an unsigned immediate 8 bit constant using binary addition and stores the result in the destination register RD. This instruction must be used first for a 16 bit immediate addition in conjunction with the ADDH instruction. CCR Effects Code and CPU Cycles ADDL Add Immediate 8 bit Constant (Low Byte) ADDL NZ V C ∆∆∆∆ N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. V: Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise. RD[15]old & RD[15]new C: Set if there is a carry from the bit 15 of the result; cleared otherwise. RD[15]old & RD[15]new Source Form Address Mode Machine Code Cycles ADDL RD, #IMM8 IMM8 1 1 1 0 0 RD IMM8 P |
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