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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 281 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 281 Page - Freescale Semiconductor, Inc |
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281 / 1348 page  Chapter 6 XGATE (S12XGATEV2) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 281 Operation RD – IMM8:$00 ⇒ RD Subtracts a signed immediate 8 bit constant from the content of high byte of register RD and using binary subtraction and stores the result in the high byte of destination register RD. This instruction can be used after an SUBL for a 16 bit immediate subtraction. Example: SUBL R2,#LOWBYTE SUBH R2,#HIGHBYTE ; R2 = R2 - 16 bit immediate CCR Effects Code and CPU Cycles SUBH Subtract Immediate 8 bit Constant (High Byte) SUBH NZ V C ∆∆∆∆ N: Set if bit 15 of the result is set; cleared otherwise. Z: Set if the result is $0000; cleared otherwise. V: Set if a two´s complement overflow resulted from the operation; cleared otherwise. RD[15]old & IMM8[7] & RD[15]new | RD[15]old & IMM8[7] & RD[15]new C: Set if there is a carry from the bit 15 of the result; cleared otherwise. RD[15]old & IMM8[7] | RD[15]old & RD[15]new | IMM8[7] & RD[15]new Source Form Address Mode Machine Code Cycles SUBH RD, #IMM8 IMM8 1 1 0 0 1 RD IMM8 P |
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